SDMA1_STATUS_REG__INSIDE_IB__SHIFT 2968 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_STATUS_REG__INSIDE_IB__SHIFT                                                                    0x9
SDMA1_STATUS_REG__INSIDE_IB__SHIFT 1446 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA1_STATUS_REG__INSIDE_IB__SHIFT 0x9
SDMA1_STATUS_REG__INSIDE_IB__SHIFT 1606 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_STATUS_REG__INSIDE_IB__SHIFT 0x9
SDMA1_STATUS_REG__INSIDE_IB__SHIFT 2124 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_STATUS_REG__INSIDE_IB__SHIFT 0x9
SDMA1_STATUS_REG__INSIDE_IB__SHIFT 2428 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_STATUS_REG__INSIDE_IB__SHIFT 0x9
SDMA1_STATUS_REG__INSIDE_IB__SHIFT  488 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_STATUS_REG__INSIDE_IB__SHIFT	0x9
SDMA1_STATUS_REG__INSIDE_IB__SHIFT  490 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_STATUS_REG__INSIDE_IB__SHIFT                                                                    0x9
SDMA1_STATUS_REG__INSIDE_IB__SHIFT  486 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_STATUS_REG__INSIDE_IB__SHIFT                                                                    0x9