SDMA1_STATUS_REG__IDLE__SHIFT 2959 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_STATUS_REG__IDLE__SHIFT                                                                         0x0
SDMA1_STATUS_REG__IDLE__SHIFT 1428 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA1_STATUS_REG__IDLE__SHIFT 0x0
SDMA1_STATUS_REG__IDLE__SHIFT 1588 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_STATUS_REG__IDLE__SHIFT 0x0
SDMA1_STATUS_REG__IDLE__SHIFT 2106 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_STATUS_REG__IDLE__SHIFT 0x0
SDMA1_STATUS_REG__IDLE__SHIFT 2410 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_STATUS_REG__IDLE__SHIFT 0x0
SDMA1_STATUS_REG__IDLE__SHIFT  479 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_STATUS_REG__IDLE__SHIFT	0x0
SDMA1_STATUS_REG__IDLE__SHIFT  481 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_STATUS_REG__IDLE__SHIFT                                                                         0x0
SDMA1_STATUS_REG__IDLE__SHIFT  477 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_STATUS_REG__IDLE__SHIFT                                                                         0x0