SDMA1_STATUS3_REG__INT_QUEUE_ID__SHIFT 3450 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_STATUS3_REG__INT_QUEUE_ID__SHIFT                                                                0x1a
SDMA1_STATUS3_REG__INT_QUEUE_ID__SHIFT  958 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_STATUS3_REG__INT_QUEUE_ID__SHIFT                                                                0x16
SDMA1_STATUS3_REG__INT_QUEUE_ID__SHIFT  954 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_STATUS3_REG__INT_QUEUE_ID__SHIFT                                                                0x16