SDMA1_STATUS2_REG__ID__SHIFT 3148 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_STATUS2_REG__ID__SHIFT                                                                          0x0
SDMA1_STATUS2_REG__ID__SHIFT 1724 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_STATUS2_REG__ID__SHIFT 0x0
SDMA1_STATUS2_REG__ID__SHIFT 2250 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_STATUS2_REG__ID__SHIFT 0x0
SDMA1_STATUS2_REG__ID__SHIFT 2546 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_STATUS2_REG__ID__SHIFT 0x0
SDMA1_STATUS2_REG__ID__SHIFT  662 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_STATUS2_REG__ID__SHIFT	0x0
SDMA1_STATUS2_REG__ID__SHIFT  680 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_STATUS2_REG__ID__SHIFT                                                                          0x0
SDMA1_STATUS2_REG__ID__SHIFT  676 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_STATUS2_REG__ID__SHIFT                                                                          0x0