SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 2947 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT                                                          0x0
SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 1420 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 0x0
SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 1580 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 0x0
SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 2098 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 0x0
SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 2402 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 0x0
SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT  467 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT	0x0
SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT  469 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT                                                          0x0
SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT  465 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT                                                          0x0