SDMA1_RLC5_STATUS__WPTR_UPDATE_PENDING__SHIFT 5054 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_RLC5_STATUS__WPTR_UPDATE_PENDING__SHIFT                                                         0x8
SDMA1_RLC5_STATUS__WPTR_UPDATE_PENDING__SHIFT 2496 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_RLC5_STATUS__WPTR_UPDATE_PENDING__SHIFT                                                         0x8
SDMA1_RLC5_STATUS__WPTR_UPDATE_PENDING__SHIFT 2488 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_RLC5_STATUS__WPTR_UPDATE_PENDING__SHIFT                                                         0x8