SDMA1_RLC5_RB_WPTR_HI__OFFSET__SHIFT 4984 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_RLC5_RB_WPTR_HI__OFFSET__SHIFT                                                                  0x0
SDMA1_RLC5_RB_WPTR_HI__OFFSET__SHIFT 2424 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_RLC5_RB_WPTR_HI__OFFSET__SHIFT                                                                  0x0
SDMA1_RLC5_RB_WPTR_HI__OFFSET__SHIFT 2416 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_RLC5_RB_WPTR_HI__OFFSET__SHIFT                                                                  0x0