SDMA1_RLC5_RB_BASE__ADDR_MASK 4970 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_RLC5_RB_BASE__ADDR_MASK                                                                         0xFFFFFFFFL
SDMA1_RLC5_RB_BASE__ADDR_MASK 2410 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_RLC5_RB_BASE__ADDR_MASK                                                                         0xFFFFFFFFL
SDMA1_RLC5_RB_BASE__ADDR_MASK 2402 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_RLC5_RB_BASE__ADDR_MASK                                                                         0xFFFFFFFFL