SDMA1_RLC3_RB_BASE__ADDR__SHIFT 4589 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_RLC3_RB_BASE__ADDR__SHIFT                                                                       0x0
SDMA1_RLC3_RB_BASE__ADDR__SHIFT 2033 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_RLC3_RB_BASE__ADDR__SHIFT                                                                       0x0
SDMA1_RLC3_RB_BASE__ADDR__SHIFT 2025 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_RLC3_RB_BASE__ADDR__SHIFT                                                                       0x0