SDMA1_RLC1_MIDCMD_DATA4__DATA4__SHIFT 4356 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_RLC1_MIDCMD_DATA4__DATA4__SHIFT                                                                 0x0
SDMA1_RLC1_MIDCMD_DATA4__DATA4__SHIFT 3050 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_RLC1_MIDCMD_DATA4__DATA4__SHIFT 0x0
SDMA1_RLC1_MIDCMD_DATA4__DATA4__SHIFT 3158 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_RLC1_MIDCMD_DATA4__DATA4__SHIFT 0x0
SDMA1_RLC1_MIDCMD_DATA4__DATA4__SHIFT 1786 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_RLC1_MIDCMD_DATA4__DATA4__SHIFT	0x0
SDMA1_RLC1_MIDCMD_DATA4__DATA4__SHIFT 1804 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_RLC1_MIDCMD_DATA4__DATA4__SHIFT                                                                 0x0
SDMA1_RLC1_MIDCMD_DATA4__DATA4__SHIFT 1796 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_RLC1_MIDCMD_DATA4__DATA4__SHIFT                                                                 0x0