SDMA1_RLC1_CONTEXT_STATUS__IDLE__SHIFT 4272 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_RLC1_CONTEXT_STATUS__IDLE__SHIFT                                                                0x2
SDMA1_RLC1_CONTEXT_STATUS__IDLE__SHIFT 1798 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA1_RLC1_CONTEXT_STATUS__IDLE__SHIFT 0x2
SDMA1_RLC1_CONTEXT_STATUS__IDLE__SHIFT 2016 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_RLC1_CONTEXT_STATUS__IDLE__SHIFT 0x2
SDMA1_RLC1_CONTEXT_STATUS__IDLE__SHIFT 2990 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_RLC1_CONTEXT_STATUS__IDLE__SHIFT 0x2
SDMA1_RLC1_CONTEXT_STATUS__IDLE__SHIFT 3098 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_RLC1_CONTEXT_STATUS__IDLE__SHIFT 0x2
SDMA1_RLC1_CONTEXT_STATUS__IDLE__SHIFT 1704 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_RLC1_CONTEXT_STATUS__IDLE__SHIFT	0x2
SDMA1_RLC1_CONTEXT_STATUS__IDLE__SHIFT 1722 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_RLC1_CONTEXT_STATUS__IDLE__SHIFT                                                                0x2
SDMA1_RLC1_CONTEXT_STATUS__IDLE__SHIFT 1714 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_RLC1_CONTEXT_STATUS__IDLE__SHIFT                                                                0x2