SDMA1_RLC1_APE1_CNTL__LIMIT__SHIFT 1824 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA1_RLC1_APE1_CNTL__LIMIT__SHIFT 0x10
SDMA1_RLC1_APE1_CNTL__LIMIT__SHIFT 2046 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_RLC1_APE1_CNTL__LIMIT__SHIFT 0x10
SDMA1_RLC1_APE1_CNTL__LIMIT__SHIFT 3022 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_RLC1_APE1_CNTL__LIMIT__SHIFT 0x10
SDMA1_RLC1_APE1_CNTL__LIMIT__SHIFT 3130 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_RLC1_APE1_CNTL__LIMIT__SHIFT 0x10