SDMA1_RLC1_APE1_CNTL__BASE__SHIFT 1822 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA1_RLC1_APE1_CNTL__BASE__SHIFT 0x0
SDMA1_RLC1_APE1_CNTL__BASE__SHIFT 2044 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_RLC1_APE1_CNTL__BASE__SHIFT 0x0
SDMA1_RLC1_APE1_CNTL__BASE__SHIFT 3020 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_RLC1_APE1_CNTL__BASE__SHIFT 0x0
SDMA1_RLC1_APE1_CNTL__BASE__SHIFT 3128 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_RLC1_APE1_CNTL__BASE__SHIFT 0x0