SDMA1_RLC0_MIDCMD_DATA7__DATA7__SHIFT 4175 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_RLC0_MIDCMD_DATA7__DATA7__SHIFT                                                                 0x0
SDMA1_RLC0_MIDCMD_DATA7__DATA7__SHIFT 2914 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_RLC0_MIDCMD_DATA7__DATA7__SHIFT 0x0
SDMA1_RLC0_MIDCMD_DATA7__DATA7__SHIFT 1609 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_RLC0_MIDCMD_DATA7__DATA7__SHIFT	0x0
SDMA1_RLC0_MIDCMD_DATA7__DATA7__SHIFT 1625 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_RLC0_MIDCMD_DATA7__DATA7__SHIFT                                                                 0x0
SDMA1_RLC0_MIDCMD_DATA7__DATA7__SHIFT 1617 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_RLC0_MIDCMD_DATA7__DATA7__SHIFT                                                                 0x0