SDMA1_RLC0_MIDCMD_DATA6__DATA6__SHIFT 4172 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_RLC0_MIDCMD_DATA6__DATA6__SHIFT                                                                 0x0
SDMA1_RLC0_MIDCMD_DATA6__DATA6__SHIFT 2912 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_RLC0_MIDCMD_DATA6__DATA6__SHIFT 0x0
SDMA1_RLC0_MIDCMD_DATA6__DATA6__SHIFT 1606 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_RLC0_MIDCMD_DATA6__DATA6__SHIFT	0x0
SDMA1_RLC0_MIDCMD_DATA6__DATA6__SHIFT 1622 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_RLC0_MIDCMD_DATA6__DATA6__SHIFT                                                                 0x0
SDMA1_RLC0_MIDCMD_DATA6__DATA6__SHIFT 1614 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_RLC0_MIDCMD_DATA6__DATA6__SHIFT                                                                 0x0