SDMA1_RLC0_MIDCMD_DATA4__DATA4__SHIFT 4166 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_RLC0_MIDCMD_DATA4__DATA4__SHIFT                                                                 0x0
SDMA1_RLC0_MIDCMD_DATA4__DATA4__SHIFT 2908 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_RLC0_MIDCMD_DATA4__DATA4__SHIFT 0x0
SDMA1_RLC0_MIDCMD_DATA4__DATA4__SHIFT 3022 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_RLC0_MIDCMD_DATA4__DATA4__SHIFT 0x0
SDMA1_RLC0_MIDCMD_DATA4__DATA4__SHIFT 1600 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_RLC0_MIDCMD_DATA4__DATA4__SHIFT	0x0
SDMA1_RLC0_MIDCMD_DATA4__DATA4__SHIFT 1616 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_RLC0_MIDCMD_DATA4__DATA4__SHIFT                                                                 0x0
SDMA1_RLC0_MIDCMD_DATA4__DATA4__SHIFT 1608 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_RLC0_MIDCMD_DATA4__DATA4__SHIFT                                                                 0x0