SDMA1_PUB_REG_TYPE0__SDMA1_POWER_CNTL__SHIFT 2558 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_PUB_REG_TYPE0__SDMA1_POWER_CNTL__SHIFT 0x2
SDMA1_PUB_REG_TYPE0__SDMA1_POWER_CNTL__SHIFT 2684 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_PUB_REG_TYPE0__SDMA1_POWER_CNTL__SHIFT 0x2
SDMA1_PUB_REG_TYPE0__SDMA1_POWER_CNTL__SHIFT  181 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_PUB_REG_TYPE0__SDMA1_POWER_CNTL__SHIFT	0x1a
SDMA1_PUB_REG_TYPE0__SDMA1_POWER_CNTL__SHIFT  181 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_PUB_REG_TYPE0__SDMA1_POWER_CNTL__SHIFT                                                          0x1a
SDMA1_PUB_REG_TYPE0__SDMA1_POWER_CNTL__SHIFT  182 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_PUB_REG_TYPE0__SDMA1_POWER_CNTL__SHIFT                                                          0x1a