SDMA1_PUB_REG_TYPE0__SDMA1_CNTL__SHIFT 2562 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_PUB_REG_TYPE0__SDMA1_CNTL__SHIFT 0x4
SDMA1_PUB_REG_TYPE0__SDMA1_CNTL__SHIFT 2688 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_PUB_REG_TYPE0__SDMA1_CNTL__SHIFT 0x4
SDMA1_PUB_REG_TYPE0__SDMA1_CNTL__SHIFT  183 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_PUB_REG_TYPE0__SDMA1_CNTL__SHIFT	0x1c
SDMA1_PUB_REG_TYPE0__SDMA1_CNTL__SHIFT  183 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_PUB_REG_TYPE0__SDMA1_CNTL__SHIFT                                                                0x1c
SDMA1_PUB_REG_TYPE0__SDMA1_CNTL__SHIFT  184 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_PUB_REG_TYPE0__SDMA1_CNTL__SHIFT                                                                0x1c