SDMA1_POWER_CNTL__MEM_POWER_LS_EN__SHIFT 2815 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_POWER_CNTL__MEM_POWER_LS_EN__SHIFT                                                              0x9
SDMA1_POWER_CNTL__MEM_POWER_LS_EN__SHIFT 2016 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_POWER_CNTL__MEM_POWER_LS_EN__SHIFT 0x9
SDMA1_POWER_CNTL__MEM_POWER_LS_EN__SHIFT 2320 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_POWER_CNTL__MEM_POWER_LS_EN__SHIFT 0x9
SDMA1_POWER_CNTL__MEM_POWER_LS_EN__SHIFT  359 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_POWER_CNTL__MEM_POWER_LS_EN__SHIFT	0x9
SDMA1_POWER_CNTL__MEM_POWER_LS_EN__SHIFT  361 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_POWER_CNTL__MEM_POWER_LS_EN__SHIFT                                                              0x9
SDMA1_POWER_CNTL__MEM_POWER_LS_EN__SHIFT  357 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_POWER_CNTL__MEM_POWER_LS_EN__SHIFT                                                              0x9