SDMA1_PHASE1_QUANTUM__UNIT__SHIFT 3083 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_PHASE1_QUANTUM__UNIT__SHIFT                                                                     0x0
SDMA1_PHASE1_QUANTUM__UNIT__SHIFT 1536 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA1_PHASE1_QUANTUM__UNIT__SHIFT 0x0
SDMA1_PHASE1_QUANTUM__UNIT__SHIFT 1706 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_PHASE1_QUANTUM__UNIT__SHIFT 0x0
SDMA1_PHASE1_QUANTUM__UNIT__SHIFT 2226 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_PHASE1_QUANTUM__UNIT__SHIFT 0x0
SDMA1_PHASE1_QUANTUM__UNIT__SHIFT 2530 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_PHASE1_QUANTUM__UNIT__SHIFT 0x0
SDMA1_PHASE1_QUANTUM__UNIT__SHIFT  597 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_PHASE1_QUANTUM__UNIT__SHIFT	0x0
SDMA1_PHASE1_QUANTUM__UNIT__SHIFT  601 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_PHASE1_QUANTUM__UNIT__SHIFT                                                                     0x0
SDMA1_PHASE1_QUANTUM__UNIT__SHIFT  597 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_PHASE1_QUANTUM__UNIT__SHIFT                                                                     0x0