SDMA1_PHASE0_QUANTUM__UNIT__SHIFT 3076 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT                                                                     0x0
SDMA1_PHASE0_QUANTUM__UNIT__SHIFT 1530 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT 0x0
SDMA1_PHASE0_QUANTUM__UNIT__SHIFT 1700 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT 0x0
SDMA1_PHASE0_QUANTUM__UNIT__SHIFT 2220 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT 0x0
SDMA1_PHASE0_QUANTUM__UNIT__SHIFT 2524 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT 0x0
SDMA1_PHASE0_QUANTUM__UNIT__SHIFT  590 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT	0x0
SDMA1_PHASE0_QUANTUM__UNIT__SHIFT  594 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT                                                                     0x0
SDMA1_PHASE0_QUANTUM__UNIT__SHIFT  590 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_PHASE0_QUANTUM__UNIT__SHIFT                                                                     0x0