SDMA1_PAGE_MIDCMD_CNTL__SPLIT_STATE__SHIFT 3993 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_PAGE_MIDCMD_CNTL__SPLIT_STATE__SHIFT                                                            0x4
SDMA1_PAGE_MIDCMD_CNTL__SPLIT_STATE__SHIFT 1431 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_PAGE_MIDCMD_CNTL__SPLIT_STATE__SHIFT	0x4
SDMA1_PAGE_MIDCMD_CNTL__SPLIT_STATE__SHIFT 1445 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_PAGE_MIDCMD_CNTL__SPLIT_STATE__SHIFT                                                            0x4
SDMA1_PAGE_MIDCMD_CNTL__SPLIT_STATE__SHIFT 1437 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_PAGE_MIDCMD_CNTL__SPLIT_STATE__SHIFT                                                            0x4