SDMA1_GFX_RB_WPTR__OFFSET__SHIFT 3648 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_GFX_RB_WPTR__OFFSET__SHIFT                                                                      0x0
SDMA1_GFX_RB_WPTR__OFFSET__SHIFT 1568 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA1_GFX_RB_WPTR__OFFSET__SHIFT 0x2
SDMA1_GFX_RB_WPTR__OFFSET__SHIFT 1752 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_GFX_RB_WPTR__OFFSET__SHIFT 0x2
SDMA1_GFX_RB_WPTR__OFFSET__SHIFT 2660 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_GFX_RB_WPTR__OFFSET__SHIFT 0x2
SDMA1_GFX_RB_WPTR__OFFSET__SHIFT 2780 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_GFX_RB_WPTR__OFFSET__SHIFT 0x2
SDMA1_GFX_RB_WPTR__OFFSET__SHIFT 1092 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_GFX_RB_WPTR__OFFSET__SHIFT	0x0
SDMA1_GFX_RB_WPTR__OFFSET__SHIFT 1102 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_GFX_RB_WPTR__OFFSET__SHIFT                                                                      0x0
SDMA1_GFX_RB_WPTR__OFFSET__SHIFT 1094 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_GFX_RB_WPTR__OFFSET__SHIFT                                                                      0x0