SDMA1_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 3622 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT                                                        0x10
SDMA1_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 1556 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA1_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10
SDMA1_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 1740 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10
SDMA1_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 2648 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10
SDMA1_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 2768 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10
SDMA1_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 1068 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT	0x10
SDMA1_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 1078 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT                                                        0x10
SDMA1_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 1070 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT                                                        0x10