SDMA1_F32_CNTL__HALT__SHIFT 3056 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_F32_CNTL__HALT__SHIFT                                                                           0x0
SDMA1_F32_CNTL__HALT__SHIFT 1522 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA1_F32_CNTL__HALT__SHIFT 0x0
SDMA1_F32_CNTL__HALT__SHIFT 1688 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_F32_CNTL__HALT__SHIFT 0x0
SDMA1_F32_CNTL__HALT__SHIFT 2208 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_F32_CNTL__HALT__SHIFT 0x0
SDMA1_F32_CNTL__HALT__SHIFT 2512 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_F32_CNTL__HALT__SHIFT 0x0
SDMA1_F32_CNTL__HALT__SHIFT  576 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_F32_CNTL__HALT__SHIFT	0x0
SDMA1_F32_CNTL__HALT__SHIFT  580 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_F32_CNTL__HALT__SHIFT                                                                           0x0
SDMA1_F32_CNTL__HALT__SHIFT  576 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_F32_CNTL__HALT__SHIFT                                                                           0x0