SDMA1_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT 3125 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT                                                      0xf
SDMA1_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT  639 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT	0xf
SDMA1_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT  650 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT                                                      0x17
SDMA1_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT  646 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT                                                      0x17