SDMA1_EDC_COUNTER__SDMA_RB_CMD_BUF_SED__SHIFT 3112 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_EDC_COUNTER__SDMA_RB_CMD_BUF_SED__SHIFT                                                         0x2
SDMA1_EDC_COUNTER__SDMA_RB_CMD_BUF_SED__SHIFT  626 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_EDC_COUNTER__SDMA_RB_CMD_BUF_SED__SHIFT	0x2
SDMA1_EDC_COUNTER__SDMA_RB_CMD_BUF_SED__SHIFT  629 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_EDC_COUNTER__SDMA_RB_CMD_BUF_SED__SHIFT                                                         0x2
SDMA1_EDC_COUNTER__SDMA_RB_CMD_BUF_SED__SHIFT  625 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_EDC_COUNTER__SDMA_RB_CMD_BUF_SED__SHIFT                                                         0x2