SDMA1_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT 3122 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT 0xc SDMA1_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT 636 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT 0xc SDMA1_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT 639 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT 0xc SDMA1_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT 635 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT 0xc