SDMA1_EDC_COUNTER__SDMA_MBANK_DATA_BUF3_SED__SHIFT 3120 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_EDC_COUNTER__SDMA_MBANK_DATA_BUF3_SED__SHIFT                                                    0xa
SDMA1_EDC_COUNTER__SDMA_MBANK_DATA_BUF3_SED__SHIFT  634 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_EDC_COUNTER__SDMA_MBANK_DATA_BUF3_SED__SHIFT	0xa
SDMA1_EDC_COUNTER__SDMA_MBANK_DATA_BUF3_SED__SHIFT  637 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_EDC_COUNTER__SDMA_MBANK_DATA_BUF3_SED__SHIFT                                                    0xa
SDMA1_EDC_COUNTER__SDMA_MBANK_DATA_BUF3_SED__SHIFT  633 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_EDC_COUNTER__SDMA_MBANK_DATA_BUF3_SED__SHIFT                                                    0xa