SDMA1_CONTEXT_REG_TYPE0__SDMA1_GFX_RB_WPTR_POLL_ADDR_HI__SHIFT 2476 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_CONTEXT_REG_TYPE0__SDMA1_GFX_RB_WPTR_POLL_ADDR_HI__SHIFT 0x6
SDMA1_CONTEXT_REG_TYPE0__SDMA1_GFX_RB_WPTR_POLL_ADDR_HI__SHIFT 2608 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_CONTEXT_REG_TYPE0__SDMA1_GFX_RB_WPTR_POLL_ADDR_HI__SHIFT 0x6