SDMA1_CHICKEN_BITS__WRITE_BURST_WAIT_CYCLE__SHIFT 2887 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_CHICKEN_BITS__WRITE_BURST_WAIT_CYCLE__SHIFT                                                     0xa
SDMA1_CHICKEN_BITS__WRITE_BURST_WAIT_CYCLE__SHIFT  419 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_CHICKEN_BITS__WRITE_BURST_WAIT_CYCLE__SHIFT	0xa
SDMA1_CHICKEN_BITS__WRITE_BURST_WAIT_CYCLE__SHIFT  421 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_CHICKEN_BITS__WRITE_BURST_WAIT_CYCLE__SHIFT                                                     0xa
SDMA1_CHICKEN_BITS__WRITE_BURST_WAIT_CYCLE__SHIFT  417 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_CHICKEN_BITS__WRITE_BURST_WAIT_CYCLE__SHIFT                                                     0xa