SDMA1_CHICKEN_BITS__CE_DFIFO_WATERMARK__SHIFT 2898 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_CHICKEN_BITS__CE_DFIFO_WATERMARK__SHIFT                                                         0x1c
SDMA1_CHICKEN_BITS__CE_DFIFO_WATERMARK__SHIFT 1566 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_CHICKEN_BITS__CE_DFIFO_WATERMARK__SHIFT 0x1c
SDMA1_CHICKEN_BITS__CE_DFIFO_WATERMARK__SHIFT 2084 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_CHICKEN_BITS__CE_DFIFO_WATERMARK__SHIFT 0x1c
SDMA1_CHICKEN_BITS__CE_DFIFO_WATERMARK__SHIFT 2388 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_CHICKEN_BITS__CE_DFIFO_WATERMARK__SHIFT 0x1c
SDMA1_CHICKEN_BITS__CE_DFIFO_WATERMARK__SHIFT  426 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_CHICKEN_BITS__CE_DFIFO_WATERMARK__SHIFT	0x1c
SDMA1_CHICKEN_BITS__CE_DFIFO_WATERMARK__SHIFT  428 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_CHICKEN_BITS__CE_DFIFO_WATERMARK__SHIFT                                                         0x1c
SDMA1_CHICKEN_BITS__CE_DFIFO_WATERMARK__SHIFT  424 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_CHICKEN_BITS__CE_DFIFO_WATERMARK__SHIFT                                                         0x1c