SDMA1_BA_THRESHOLD__WRITE_THRES__SHIFT 3096 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_BA_THRESHOLD__WRITE_THRES__SHIFT                                                                0x10
SDMA1_BA_THRESHOLD__WRITE_THRES__SHIFT 1718 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_BA_THRESHOLD__WRITE_THRES__SHIFT 0x10
SDMA1_BA_THRESHOLD__WRITE_THRES__SHIFT 2238 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_BA_THRESHOLD__WRITE_THRES__SHIFT 0x10
SDMA1_BA_THRESHOLD__WRITE_THRES__SHIFT 2570 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_BA_THRESHOLD__WRITE_THRES__SHIFT 0x10
SDMA1_BA_THRESHOLD__WRITE_THRES__SHIFT  610 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_BA_THRESHOLD__WRITE_THRES__SHIFT	0x10
SDMA1_BA_THRESHOLD__WRITE_THRES__SHIFT  614 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_BA_THRESHOLD__WRITE_THRES__SHIFT                                                                0x10
SDMA1_BA_THRESHOLD__WRITE_THRES__SHIFT  610 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_BA_THRESHOLD__WRITE_THRES__SHIFT                                                                0x10