SDMA0_VIRT_RESET_REQ__VF_MASK 39989 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_VIRT_RESET_REQ__VF_MASK                                                                         0x7FFFFFFFL
SDMA0_VIRT_RESET_REQ__VF_MASK 1203 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_VIRT_RESET_REQ__VF_MASK 0xffff
SDMA0_VIRT_RESET_REQ__VF_MASK 1703 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_VIRT_RESET_REQ__VF_MASK 0xffff
SDMA0_VIRT_RESET_REQ__VF_MASK   56 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_VIRT_RESET_REQ__VF_MASK	0x0000FFFFL
SDMA0_VIRT_RESET_REQ__VF_MASK   56 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_VIRT_RESET_REQ__VF_MASK                                                                         0x0000FFFFL
SDMA0_VIRT_RESET_REQ__VF_MASK   56 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_VIRT_RESET_REQ__VF_MASK                                                                         0x0000FFFFL
SDMA0_VIRT_RESET_REQ__VF_MASK   56 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_VIRT_RESET_REQ__VF_MASK                                                                         0x0000FFFFL