SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT 626 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT 0x0 SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT 906 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT 0x0 SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT 905 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT 0x0 SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT 928 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT 0x0 SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT 922 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT 0x0