SDMA0_UTCL1_WR_XNACK0__XNACK_ADDR_LO__SHIFT  623 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_UTCL1_WR_XNACK0__XNACK_ADDR_LO__SHIFT                                                           0x0
SDMA0_UTCL1_WR_XNACK0__XNACK_ADDR_LO__SHIFT  903 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_UTCL1_WR_XNACK0__XNACK_ADDR_LO__SHIFT	0x0
SDMA0_UTCL1_WR_XNACK0__XNACK_ADDR_LO__SHIFT  902 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_UTCL1_WR_XNACK0__XNACK_ADDR_LO__SHIFT                                                           0x0
SDMA0_UTCL1_WR_XNACK0__XNACK_ADDR_LO__SHIFT  925 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_UTCL1_WR_XNACK0__XNACK_ADDR_LO__SHIFT                                                           0x0
SDMA0_UTCL1_WR_XNACK0__XNACK_ADDR_LO__SHIFT  919 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_UTCL1_WR_XNACK0__XNACK_ADDR_LO__SHIFT                                                           0x0