SDMA0_UTCL1_WR_STATUS__NEXT_WR_VECTOR__SHIFT  536 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_UTCL1_WR_STATUS__NEXT_WR_VECTOR__SHIFT                                                          0x11
SDMA0_UTCL1_WR_STATUS__NEXT_WR_VECTOR__SHIFT  821 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_UTCL1_WR_STATUS__NEXT_WR_VECTOR__SHIFT	0x16
SDMA0_UTCL1_WR_STATUS__NEXT_WR_VECTOR__SHIFT  820 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_UTCL1_WR_STATUS__NEXT_WR_VECTOR__SHIFT                                                          0x16
SDMA0_UTCL1_WR_STATUS__NEXT_WR_VECTOR__SHIFT  843 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_UTCL1_WR_STATUS__NEXT_WR_VECTOR__SHIFT                                                          0x16
SDMA0_UTCL1_WR_STATUS__NEXT_WR_VECTOR__SHIFT  837 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_UTCL1_WR_STATUS__NEXT_WR_VECTOR__SHIFT                                                          0x16