SDMA0_UTCL1_RD_XNACK1__XNACK_VMID__SHIFT  615 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_UTCL1_RD_XNACK1__XNACK_VMID__SHIFT                                                              0x4
SDMA0_UTCL1_RD_XNACK1__XNACK_VMID__SHIFT  895 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_UTCL1_RD_XNACK1__XNACK_VMID__SHIFT	0x4
SDMA0_UTCL1_RD_XNACK1__XNACK_VMID__SHIFT  894 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_UTCL1_RD_XNACK1__XNACK_VMID__SHIFT                                                              0x4
SDMA0_UTCL1_RD_XNACK1__XNACK_VMID__SHIFT  917 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_UTCL1_RD_XNACK1__XNACK_VMID__SHIFT                                                              0x4
SDMA0_UTCL1_RD_XNACK1__XNACK_VMID__SHIFT  911 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_UTCL1_RD_XNACK1__XNACK_VMID__SHIFT                                                              0x4