SDMA0_UTCL1_INV0__INV_MIDDLE__SHIFT  856 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_UTCL1_INV0__INV_MIDDLE__SHIFT	0x0
SDMA0_UTCL1_INV0__INV_MIDDLE__SHIFT  855 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_UTCL1_INV0__INV_MIDDLE__SHIFT                                                                   0x0
SDMA0_UTCL1_INV0__INV_MIDDLE__SHIFT  878 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_UTCL1_INV0__INV_MIDDLE__SHIFT                                                                   0x0
SDMA0_UTCL1_INV0__INV_MIDDLE__SHIFT  872 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_UTCL1_INV0__INV_MIDDLE__SHIFT                                                                   0x0