SDMA0_UTCL1_CNTL__VADDR_WATERMK__SHIFT  444 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_UTCL1_CNTL__VADDR_WATERMK__SHIFT                                                                0x1d
SDMA0_UTCL1_CNTL__VADDR_WATERMK__SHIFT  727 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_UTCL1_CNTL__VADDR_WATERMK__SHIFT	0x1d
SDMA0_UTCL1_CNTL__VADDR_WATERMK__SHIFT  726 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_UTCL1_CNTL__VADDR_WATERMK__SHIFT                                                                0x1d
SDMA0_UTCL1_CNTL__VADDR_WATERMK__SHIFT  749 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_UTCL1_CNTL__VADDR_WATERMK__SHIFT                                                                0x1d
SDMA0_UTCL1_CNTL__VADDR_WATERMK__SHIFT  743 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_UTCL1_CNTL__VADDR_WATERMK__SHIFT                                                                0x1d