SDMA0_STATUS_REG__SRBM_IDLE__SHIFT  207 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT                                                                    0xe
SDMA0_STATUS_REG__SRBM_IDLE__SHIFT  938 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe
SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 1018 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe
SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 1036 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe
SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 1542 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT 0xe
SDMA0_STATUS_REG__SRBM_IDLE__SHIFT  499 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT	0xe
SDMA0_STATUS_REG__SRBM_IDLE__SHIFT  498 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT                                                                    0xe
SDMA0_STATUS_REG__SRBM_IDLE__SHIFT  505 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT                                                                    0xe
SDMA0_STATUS_REG__SRBM_IDLE__SHIFT  499 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_STATUS_REG__SRBM_IDLE__SHIFT                                                                    0xe