SDMA0_STATUS_REG__INT_IDLE__SHIFT  220 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE__SHIFT                                                                     0x1e
SDMA0_STATUS_REG__INT_IDLE__SHIFT  960 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE__SHIFT 0x1e
SDMA0_STATUS_REG__INT_IDLE__SHIFT 1044 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE__SHIFT 0x1e
SDMA0_STATUS_REG__INT_IDLE__SHIFT 1062 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE__SHIFT 0x1e
SDMA0_STATUS_REG__INT_IDLE__SHIFT 1568 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE__SHIFT 0x1e
SDMA0_STATUS_REG__INT_IDLE__SHIFT  512 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE__SHIFT	0x1e
SDMA0_STATUS_REG__INT_IDLE__SHIFT  511 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE__SHIFT                                                                     0x1e
SDMA0_STATUS_REG__INT_IDLE__SHIFT  518 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE__SHIFT                                                                     0x1e
SDMA0_STATUS_REG__INT_IDLE__SHIFT  512 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE__SHIFT                                                                     0x1e