SDMA0_STATUS_REG__INT_IDLE_MASK  249 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE_MASK                                                                       0x40000000L
SDMA0_STATUS_REG__INT_IDLE_MASK  959 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE_MASK 0x40000000
SDMA0_STATUS_REG__INT_IDLE_MASK 1043 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE_MASK 0x40000000
SDMA0_STATUS_REG__INT_IDLE_MASK 1061 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE_MASK 0x40000000
SDMA0_STATUS_REG__INT_IDLE_MASK 1567 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE_MASK 0x40000000
SDMA0_STATUS_REG__INT_IDLE_MASK  541 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE_MASK	0x40000000L
SDMA0_STATUS_REG__INT_IDLE_MASK  540 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE_MASK                                                                       0x40000000L
SDMA0_STATUS_REG__INT_IDLE_MASK  547 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE_MASK                                                                       0x40000000L
SDMA0_STATUS_REG__INT_IDLE_MASK  541 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_STATUS_REG__INT_IDLE_MASK                                                                       0x40000000L