SDMA0_STATUS_REG__IDLE__SHIFT  193 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_STATUS_REG__IDLE__SHIFT                                                                         0x0
SDMA0_STATUS_REG__IDLE__SHIFT  910 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_STATUS_REG__IDLE__SHIFT 0x0
SDMA0_STATUS_REG__IDLE__SHIFT  990 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_STATUS_REG__IDLE__SHIFT 0x0
SDMA0_STATUS_REG__IDLE__SHIFT 1008 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_STATUS_REG__IDLE__SHIFT 0x0
SDMA0_STATUS_REG__IDLE__SHIFT 1514 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_STATUS_REG__IDLE__SHIFT 0x0
SDMA0_STATUS_REG__IDLE__SHIFT  485 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_STATUS_REG__IDLE__SHIFT	0x0
SDMA0_STATUS_REG__IDLE__SHIFT  484 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_STATUS_REG__IDLE__SHIFT                                                                         0x0
SDMA0_STATUS_REG__IDLE__SHIFT  491 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_STATUS_REG__IDLE__SHIFT                                                                         0x0
SDMA0_STATUS_REG__IDLE__SHIFT  485 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_STATUS_REG__IDLE__SHIFT                                                                         0x0