SDMA0_STATUS_REG__EX_IDLE__SHIFT  203 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_STATUS_REG__EX_IDLE__SHIFT                                                                      0xa
SDMA0_STATUS_REG__EX_IDLE__SHIFT  930 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_STATUS_REG__EX_IDLE__SHIFT 0xa
SDMA0_STATUS_REG__EX_IDLE__SHIFT 1010 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_STATUS_REG__EX_IDLE__SHIFT 0xa
SDMA0_STATUS_REG__EX_IDLE__SHIFT 1028 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_STATUS_REG__EX_IDLE__SHIFT 0xa
SDMA0_STATUS_REG__EX_IDLE__SHIFT 1534 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_STATUS_REG__EX_IDLE__SHIFT 0xa
SDMA0_STATUS_REG__EX_IDLE__SHIFT  495 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_STATUS_REG__EX_IDLE__SHIFT	0xa
SDMA0_STATUS_REG__EX_IDLE__SHIFT  494 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_STATUS_REG__EX_IDLE__SHIFT                                                                      0xa
SDMA0_STATUS_REG__EX_IDLE__SHIFT  501 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_STATUS_REG__EX_IDLE__SHIFT                                                                      0xa
SDMA0_STATUS_REG__EX_IDLE__SHIFT  495 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_STATUS_REG__EX_IDLE__SHIFT                                                                      0xa