SDMA0_STATUS3_REG__PREV_VM_CMD__SHIFT  713 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_STATUS3_REG__PREV_VM_CMD__SHIFT                                                                 0x10
SDMA0_STATUS3_REG__PREV_VM_CMD__SHIFT  979 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_STATUS3_REG__PREV_VM_CMD__SHIFT	0x10
SDMA0_STATUS3_REG__PREV_VM_CMD__SHIFT  978 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_STATUS3_REG__PREV_VM_CMD__SHIFT                                                                 0x10
SDMA0_STATUS3_REG__PREV_VM_CMD__SHIFT 1001 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_STATUS3_REG__PREV_VM_CMD__SHIFT                                                                 0x10
SDMA0_STATUS3_REG__PREV_VM_CMD__SHIFT  995 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_STATUS3_REG__PREV_VM_CMD__SHIFT                                                                 0x10