SDMA0_STATUS3_REG__INT_QUEUE_ID__SHIFT  720 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_STATUS3_REG__INT_QUEUE_ID__SHIFT                                                                0x1a
SDMA0_STATUS3_REG__INT_QUEUE_ID__SHIFT 1004 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_STATUS3_REG__INT_QUEUE_ID__SHIFT                                                                0x16
SDMA0_STATUS3_REG__INT_QUEUE_ID__SHIFT  998 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_STATUS3_REG__INT_QUEUE_ID__SHIFT                                                                0x16