SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT  258 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT                                                                 0x6
SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT  976 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT 0x6
SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT 1060 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT 0x6
SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT 1078 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT 0x6
SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT 1584 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT 0x6
SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT  550 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT	0x6
SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT  549 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT                                                                 0x6
SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT  556 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT                                                                 0x6
SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT  550 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT                                                                 0x6