SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT  260 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT                                                               0xa
SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT  978 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT 0xa
SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT 1064 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT 0xa
SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT 1082 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT 0xa
SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT 1588 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT 0xa
SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT  552 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT	0xa
SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT  551 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT                                                               0xa
SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT  558 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT                                                               0xa
SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT  552 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_STATUS1_REG__CE_AFIFO_FULL__SHIFT                                                               0xa