SDMA0_RLC5_STATUS__WPTR_UPDATE_PENDING__SHIFT 2324 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_RLC5_STATUS__WPTR_UPDATE_PENDING__SHIFT                                                         0x8
SDMA0_RLC5_STATUS__WPTR_UPDATE_PENDING__SHIFT 2542 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_RLC5_STATUS__WPTR_UPDATE_PENDING__SHIFT                                                         0x8
SDMA0_RLC5_STATUS__WPTR_UPDATE_PENDING__SHIFT 2532 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_RLC5_STATUS__WPTR_UPDATE_PENDING__SHIFT                                                         0x8